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• State-of-the-Art BiCMOS Design
Significantly Reduces ICCZ
• ESD Protection Exceeds 2000 V Per
MIL-STD-883C, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
• High-Impedance State During Power Up and
Power Down
• 3-State True Outputs Drive Bus Lines or
Buffer-Memory Address Registers
• Full Parallel Access for Loading • Package Options Include Plastic
Small-Outline (DW) Packages and Standard
Plastic 300-mil DIPs (N)
SN64BCT373 OCTAL TRANSPARENT DĆTYPE LATCH
WITH 3ĆSTATE OUTPUTS
SCBS065A − JUNE 1990 − REVISED JANUARY 1994
DW OR N PACKAGE (TOP VIEW)
OE 1Q 1D 2D 2Q 3Q 3D 4D 4Q GND
1 2 3 4 5 6 7 8 9 10
20 VCC 19 8Q 18 8D 17 7D 16 7Q 15 6Q 14 6D 13 5D 12 5Q 11 LE
description
This 8-bit latch features 3-state outputs designed specifically for driving highly capacitive or
SN64BCT373 Datasheet
